pyuvm._reg.uvm_reg_field

Module Contents

Classes

uvm_reg_field

Data

__all__
logger
_PREDEFINED_POLICIES

API

pyuvm._reg.uvm_reg_field.__all__

[‘uvm_reg_field’]

pyuvm._reg.uvm_reg_field.logger

‘getLogger(…)’

pyuvm._reg.uvm_reg_field._PREDEFINED_POLICIES: set[str]

‘set(…)’

class pyuvm._reg.uvm_reg_field.uvm_reg_field(name: str = 'uvm_reg_field')

Bases: pyuvm._s05_base_classes.uvm_object

_max_size: ClassVar[int]

0

_policy_names: ClassVar[set[str]]

None

_reg_field_registry: ClassVar[dict[str, pyuvm._reg.uvm_reg_field.uvm_reg_field]]

‘dict(…)’

configure(parent: pyuvm._reg.uvm_reg.uvm_reg, size: int, lsb_pos: int, access: str, volatile: bool, reset: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, has_reset: bool = None, is_rand: bool = None, individually_accessible: bool = None, **kwargs) → None

get_full_name() → str

get_parent() → pyuvm._reg.uvm_reg.uvm_reg

get_register() → pyuvm._reg.uvm_reg.uvm_reg

get_lsb_pos() → int

get_n_bits() → int

static get_max_size() → int

set_access(mode: str) → str

set_rand_mode(rand_mode: bool) → None

static define_access(name: str) → bool

get_access(map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None) → str | None

is_known_access(map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None) → bool

set_volatility(volatile: bool) → None

is_volatile() → bool

static get_field_by_full_name(name: str) → pyuvm._reg.uvm_reg_field.uvm_reg_field

set_field(value: int) → None

set(value: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, fname: str = '', lineno: int = 0) → None

get(fname: str = '', lineno: int = 0) → pyuvm._reg.uvm_reg_model.uvm_reg_data_t

get_mirrored_value(fname: str = '', lineno: int = 0) → pyuvm._reg.uvm_reg_model.uvm_reg_data_t

reset(kind: str = 'HARD') → None

get_reset(kind: str = 'HARD') → pyuvm._reg.uvm_reg_model.uvm_reg_data_t

has_reset(kind: str = 'HARD', delete: bool = False) → bool

set_reset(value: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, kind: str = 'HARD') → None

needs_update() → bool

abstractmethod async write(value: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, path: pyuvm._reg.uvm_reg_model.uvm_door_e = uvm_door_e.UVM_DEFAULT_DOOR, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, prior: int = -1, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0) → pyuvm._reg.uvm_reg_model.uvm_status_e

abstractmethod async read(path: pyuvm._reg.uvm_reg_model.uvm_door_e = uvm_door_e.UVM_DEFAULT_DOOR, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, prior: int = -1, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0) → tuple[pyuvm._reg.uvm_reg_model.uvm_status_e, pyuvm._reg.uvm_reg_model.uvm_reg_data_t]

abstractmethod async poke(value: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, kind: str = '', parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0) → pyuvm._reg.uvm_reg_model.uvm_status_e

abstractmethod async peek(kind: str = '', parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0) → tuple[pyuvm._reg.uvm_reg_model.uvm_status_e, pyuvm._reg.uvm_reg_model.uvm_reg_data_t]

abstractmethod async mirror(check: pyuvm._reg.uvm_reg_model.uvm_check_e = uvm_check_e.UVM_NO_CHECK, path: pyuvm._reg.uvm_reg_model.uvm_door_e = uvm_door_e.UVM_DEFAULT_DOOR, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, prior: int = -1, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0) → pyuvm._reg.uvm_reg_model.uvm_status_e

set_compare(check: pyuvm._reg.uvm_reg_model.uvm_check_e) → None

get_compare() → pyuvm._reg.uvm_reg_model.uvm_check_e

abstractmethod is_indv_accessible(path: pyuvm._reg.uvm_reg_model.uvm_door_e, local_map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → bool

predict(value: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, be: pyuvm._reg.uvm_reg_model.uvm_reg_byte_en_t = -1, kind: pyuvm._reg.uvm_reg_model.uvm_predict_e = uvm_predict_e.UVM_PREDICT_DIRECT, path: pyuvm._reg.uvm_reg_model.uvm_door_e = uvm_door_e.UVM_FRONTDOOR, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, fname: str = '', lineno: int = 0) → bool

_predict(cur_val: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, wr_val: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → pyuvm._reg.uvm_reg_model.uvm_reg_data_t

abstractmethod _update() → pyuvm._reg.uvm_reg_model.uvm_reg_data_t

abstractmethod _check_access(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item, map_info: pyuvm._reg.uvm_reg_map.uvm_reg_map_info) → bool

abstractmethod async do_write(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod async do_read(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

do_predict(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item, kind: pyuvm._reg.uvm_reg_model.uvm_predict_e = uvm_predict_e.UVM_PREDICT_DIRECT, be: pyuvm._reg.uvm_reg_model.uvm_reg_byte_en_t = -1) → None

abstractmethod pre_randomize() → None

abstractmethod post_randomize() → None

abstractmethod async pre_write(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod async post_write(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod async pre_read(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod async post_read(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

field_lock() → None

get_value() → pyuvm._reg.uvm_reg_model.uvm_reg_data_t

set_response(f_response)

get_response()

set_throw_error_on_read(teor=False)

set_throw_error_on_write(teow=False)

set_debug(error_on_read=None, error_on_write=None)