pyuvm._reg.uvm_reg

Module Contents

Classes

uvm_reg

Data

__all__
logger

API

pyuvm._reg.uvm_reg.__all__

[‘uvm_reg’]

pyuvm._reg.uvm_reg.logger

‘getLogger(…)’

class pyuvm._reg.uvm_reg.uvm_reg(name='', n_bits: int = 0, has_coverage: int = 0, **kwargs)

Bases: pyuvm._s05_base_classes.uvm_object

_max_size: ClassVar[int]

0

_reg_registry: ClassVar[dict[str, pyuvm._reg.uvm_reg.uvm_reg]]

None

configure(blk_parent: pyuvm._reg.uvm_reg_block.uvm_reg_block, regfile_parent: pyuvm._reg.uvm_reg_file.uvm_reg_file = None, hdl_path: str = '', throw_error_on_read: bool = False, throw_error_on_write: bool = False, **kwargs) → None

set_offset(map: pyuvm._reg.uvm_reg_map.uvm_reg_map, offset: pyuvm._reg.uvm_reg_model.uvm_reg_addr_t, unmapped: bool = False) → None

abstractmethod _set_parent(blk_parent: pyuvm._reg.uvm_reg_block.uvm_reg_block, regfile_parent: pyuvm._reg.uvm_reg_file.uvm_reg_file) → None

_add_field(field: pyuvm._reg.uvm_reg_field.uvm_reg_field) → None

add_map(map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → None

_lock_model() → None

_unlock_model() → None

abstractmethod unregister(map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → None

get_full_name() → str

get_parent() → pyuvm._reg.uvm_reg_block.uvm_reg_block

get_block() → pyuvm._reg.uvm_reg_block.uvm_reg_block

get_regfile() → pyuvm._reg.uvm_reg_file.uvm_reg_file

get_n_maps() → int

is_in_map(map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → bool

get_maps(maps: list[pyuvm._reg.uvm_reg_map.uvm_reg_map]) → None

get_local_map(map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → pyuvm._reg.uvm_reg_map.uvm_reg_map | None

get_default_map() → pyuvm._reg.uvm_reg_map.uvm_reg_map | None

get_rights(map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None) → str

get_n_bits() → int

get_n_bytes() → int

static get_max_size() → int

get_fields() → list[pyuvm._reg.uvm_reg_field.uvm_reg_field]

abstractmethod get_field_by_name(name: str) → pyuvm._reg.uvm_reg_field.uvm_reg_field

_get_fields_access(map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → str

abstractmethod get_offset(map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → pyuvm._reg.uvm_reg_model.uvm_reg_addr_t

get_address(map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None) → pyuvm._reg.uvm_reg_model.uvm_reg_addr_t

get_addresses(map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None) → tuple[int, list[pyuvm._reg.uvm_reg_model.uvm_reg_addr_t]]

static get_reg_by_full_name(full_name: str) → pyuvm._reg.uvm_reg.uvm_reg | None

set(value: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, fname: str = '', lineno: int = 0) → None

get(fname: str = '', lineno: int = 0) → pyuvm._reg.uvm_reg_model.uvm_reg_data_t

get_mirrored_value(fname: str = '', lineno: int = 0) → int

abstractmethod needs_update() → bool

reset(kind: str = 'HARD') → None

abstractmethod get_reset(kind: str = 'HARD') → int

abstractmethod has_reset(kind: str = 'HARD', delete: bool = False) → bool

abstractmethod set_reset(value: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, kind: str = 'HARD') → None

async write(value: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, path: pyuvm._reg.uvm_reg_model.uvm_door_e = uvm_door_e.UVM_DEFAULT_DOOR, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, prior: int = -1, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0, **kwargs) → pyuvm._reg.uvm_reg_model.uvm_status_e

async read(path: pyuvm._reg.uvm_reg_model.uvm_door_e = uvm_door_e.UVM_DEFAULT_DOOR, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, prior: int = -1, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0, **kwargs) → tuple[pyuvm._reg.uvm_reg_model.uvm_status_e, pyuvm._reg.uvm_reg_model.uvm_reg_data_t]

abstractmethod async poke(value: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, kind: str = '', parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0) → pyuvm._reg.uvm_reg_model.uvm_status_e

abstractmethod async peek(kind: str = '', parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0) → tuple[pyuvm._reg.uvm_reg_model.uvm_status_e, pyuvm._reg.uvm_reg_model.uvm_reg_data_t]

abstractmethod async update(path: pyuvm._reg.uvm_reg_model.uvm_door_e = uvm_door_e.UVM_DEFAULT_DOOR, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, prior: int = -1, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0) → pyuvm._reg.uvm_reg_model.uvm_status_e

abstractmethod async mirror(check: pyuvm._reg.uvm_reg_model.uvm_check_e = uvm_check_e.UVM_NO_CHECK, path: pyuvm._reg.uvm_reg_model.uvm_door_e = uvm_door_e.UVM_DEFAULT_DOOR, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, prior: int = -1, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0) → pyuvm._reg.uvm_reg_model.uvm_status_e

predict(value: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, be: pyuvm._reg.uvm_reg_model.uvm_reg_byte_en_t = -1, kind: pyuvm._reg.uvm_reg_model.uvm_predict_e = uvm_predict_e.UVM_PREDICT_DIRECT, path: pyuvm._reg.uvm_reg_model.uvm_door_e = uvm_door_e.UVM_FRONTDOOR, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, fname: str = '', lineno: int = 0) → bool

is_busy() → bool

_set_is_busy(busy: bool) → None

async _read(path: pyuvm._reg.uvm_reg_model.uvm_door_e = uvm_door_e.UVM_DEFAULT_DOOR, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, parent: pyuvm._s14_15_python_sequences.uvm_sequence_base = None, prior: int = -1, extension: pyuvm._s05_base_classes.uvm_object = None, fname: str = '', lineno: int = 0) → tuple[pyuvm._reg.uvm_reg_model.uvm_status_e, pyuvm._reg.uvm_reg_model.uvm_reg_data_t]

_check_access(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → tuple[bool, pyuvm._reg.uvm_reg_map.uvm_reg_map_info | None]

abstractmethod do_check(expected: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, actual: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → bool

async do_write(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod async _do_write_backdoor(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item, map_info: pyuvm._reg.uvm_reg_map.uvm_reg_map_info) → None

async _do_write_frontdoor(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item, map_info: pyuvm._reg.uvm_reg_map.uvm_reg_map_info) → None

async do_read(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod async _do_read_backdoor(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item, map_info: pyuvm._reg.uvm_reg_map.uvm_reg_map_info) → None

async _do_read_frontdoor(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item, map_info: pyuvm._reg.uvm_reg_map.uvm_reg_map_info) → None

do_predict(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item, kind: pyuvm._reg.uvm_reg_model.uvm_predict_e, be: pyuvm._reg.uvm_reg_model.uvm_reg_byte_en_t = -1) → None

abstractmethod set_frontdoor(ftdr: pyuvm._reg.uvm_reg_sequence.uvm_reg_frontdoor, map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None, fname: str = '', lineno: int = 0) → None

abstractmethod get_frontdoor(map: pyuvm._reg.uvm_reg_map.uvm_reg_map = None) → pyuvm._reg.uvm_reg_sequence.uvm_reg_frontdoor

abstractmethod set_backdoor(bkdr: pyuvm._reg.uvm_reg_backdoor.uvm_reg_backdoor, fname: str = '', lineno: int = 0) → None

abstractmethod get_backdoor(inherited: bool = True) → pyuvm._reg.uvm_reg_backdoor.uvm_reg_backdoor

abstractmethod clear_hdl_path(kind: str = 'RTL') → None

abstractmethod add_hdl_path(slices: list[pyuvm._reg.uvm_reg_model.uvm_hdl_path_slice], kind: str = 'RTL') → None

add_hdl_path_slice(name: str, offset: int, size: int, first: bool = False, kind: str = 'RTL') → None

abstractmethod has_hdl_path(kind: str = '') → bool

abstractmethod get_hdl_path(paths: list[pyuvm._reg.uvm_reg_model.uvm_hdl_path_concat], kind: str = '') → None

abstractmethod get_hdl_path_kind(kinds: list[str]) → None

abstractmethod get_full_hdl_path(paths: list[pyuvm._reg.uvm_reg_model.uvm_hdl_path_concat], kind: str = '', separator: str = '.') → None

abstractmethod async backdoor_read(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod async backdoor_write(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod backdoor_read_func(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → pyuvm._reg.uvm_reg_model.uvm_status_e

abstractmethod backdoor_watch() → None

abstractmethod include_coverage(scope: str, models: pyuvm._reg.uvm_reg_model.uvm_reg_cvr_t, accessor: pyuvm._s05_base_classes.uvm_object = None) → None

abstractmethod build_coverage(models: pyuvm._reg.uvm_reg_model.uvm_reg_cvr_t) → pyuvm._reg.uvm_reg_model.uvm_reg_cvr_t

abstractmethod add_coverage(models: pyuvm._reg.uvm_reg_model.uvm_reg_cvr_t) → None

abstractmethod has_coverage(models: pyuvm._reg.uvm_reg_model.uvm_reg_cvr_t) → bool

abstractmethod set_coverage(is_on: pyuvm._reg.uvm_reg_model.uvm_reg_cvr_t) → pyuvm._reg.uvm_reg_model.uvm_reg_cvr_t

abstractmethod get_coverage(is_on: pyuvm._reg.uvm_reg_model.uvm_reg_cvr_t) → bool

abstractmethod sample(data: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, byte_en: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, is_read: bool, map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → None

abstractmethod sample_values() → None

_sample(data: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, byte_en: pyuvm._reg.uvm_reg_model.uvm_reg_data_t, is_read: bool, map: pyuvm._reg.uvm_reg_map.uvm_reg_map) → None

abstractmethod async pre_write(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod async post_write(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod async pre_read(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

abstractmethod async post_read(rw: pyuvm._reg.uvm_reg_item.uvm_reg_item) → None

get_reg_size() → int

property n_bits: int

check_err_list() → None

_set_lock() → None

set_desired(value)

get_desired()

get_access_policy()